1. Field of the Invention
The present invention relates to a method of determining a design framework, more particularly to a method of determining a design framework based on the intrinsic complexities of a plurality of algorithms for a predetermined application.
2. Description of the Related Art
Conventionally, the simplest way of estimating the complexity of an algorithm is that in which the nested loop architecture within the algorithm is used as the basis for estimating the complexity of the same. The following pseudocode of an algorithm is used as an example:
for (i=1 to n) {// first loopfor (j=1 to n) {// second loopaction A}}
Since the second loop is included within the first loop, the complexity of the algorithm is estimated to be O(n2).
However, for algorithms used in many applications, such as multimedia applications, it is not feasible to use such a rudimentary approach to analyze complexity. As a result, many improved measuring methods of estimating complexity of algorithms have been disclosed, such as “H.264/AVC Baseline Profile Decoder Complexity Analysis” by M. Horowitz et al. and published in 2003 in IEEE Transactions on Circuits and Systems for Video Technology. In this article, the TRIMEDIA® TM-1300 DSP (digital signal processor) and 600 MHz PENTIUM® 3 CPU (central processing unit) hardware architectures are used to conduct complexity analysis with respect to the H.264/AVC algorithm. Hence, the method proposed in this article utilizes a bottom-up approach in performing analysis, in which the hardware architecture to be used is first established, after which complexity analysis is performed with respect to a specific algorithm with the aim of finding the optimal algorithm for the particular hardware architecture. In this particular instance, therefore, the analysis result is only suitable for use in conjunction with the TRIMEDIA® TM-1300 DSP and 600 MHz PENTIUM® 3 CPU hardware architectures.
Another example of an improved method of estimating the complexity of algorithms is the method disclosed in “High-Abstraction Level Complexity Analysis and Memory Architecture Simulations of Multimedia Algorithms” by M. Ravasi and M. Mattavelli and published in 2005 in IEEE Transactions on Circuits and Systems for Video Technology. In this method, a C language code of an algorithm and an externally defined memory simulation core are used together to analyze the complexity of an algorithm. However, a bottom-up approach is also used in this method, such that the analysis result obtained therefrom varies with different memory simulation cores. Moreover, different results are caused by different C language coding styles or when the program code is converted into another programming language.
The methods disclosed in the aforementioned articles share the common disadvantage of using a bottom-up approach to perform analysis when estimating complexity of an algorithm. With such an approach, since a specific software and hardware platform is determined before analysis, an optimal algorithm is found for the specific software and hardware platform, and the algorithm may not be the most suitable for different situations. In other words, the prior art methods only find a local optimal solution for a specific software and hardware platform, and this often is not the global optimal solution.